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mic4605 85v half - bridge mosfet drivers with adaptive dead time and shoot - through protection micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944 - 0800 ? fax + 1 (408) 474 - 1000 ? http://www.micrel.com november 11, 2013 revision 1.0 general description the mic4605 is an 85v half - bridge mosfet driver that features adaptive - dead - time and shoot - through protection. the adaptive - dead - time circuitry actively monitors the half - bridge outputs to minimize the time between high - side and low - side mosfet transitions, thus maximizing power efficiency. anti - shoot - through circuitry prevents erroneous inputs and noise from turning both mosfets on at the same time. the mic4605 also offers a wide 5.5v to 16v operating supply range to maximize system efficiency. the low 5.5v operating voltage allows longer run times in battery - powered applications. additionally, the mic4605?s adjustable gate drive sets the gate drive voltage to vdd for optimal mosfet r ds( on ) , which minimizes power loss due to the mosfet?s r ds( on ) . the mic4605 is available in an 8 - pin soic package and a tiny 10 - pin 2.5mm 2.5mm tdfn package. both packages have an operating junction temperature range of ? 40 c to +125 c. datasheets and support documentation are available on micrel?s web site at : www.micrel.com . fea tures ? 5. 5v to 16v gate drive supply voltage range ? advanced adaptive - dead - time ? intelligent shoot - through protection ? mic4605 - 1: d ual ttl inputs ? mic4605 - 2: single pwm input ? enable input for on/off control ? on - chip bootstrap diode ? fast 35 ns propagation times ? d rives 1000pf load with 20ns rise and fall times ? low power consumption : 135 a quiescent current ? separate high - and low - side u nder voltage p rotection ? ? 40c to +125c junction temperature range applications ? fans ? power inverters ? high - voltage step - down regulators ? half - , full - , and three - phase bridge motor drives ? appliances ? e - b ikes mic4605 door lock/unlock module
micrel, inc. mic4605 november 11, 2013 2 revis ion 1.0 ordering information part number part marking input junction temperature range package mic4605 - 1ymt 165 dual ttl inputs ? 40c to +125c 10- pin 2.5mm 2.5mm tdfn mic4605 - 2ymt 265 single pwm ttl input ? 40c to +125c 10- pin 2.5mm 2.5mm tdfn mic4605 -1ym 4605- 1ym dual ttl inputs ? 40c to +125c 8- pin soic -8 mic4605 -2ym 4605- 2ym single pwm ttl input ? 40c to +125c 8- pin soic -8 pin configurations mic4605 - 1ymt 10- pin 2.5mm 2.5mm tdfn (mt) (top view) mic4605 -2 ymt 10- pin 2.5mm 2.5mm tdfn (mt) (top view) mic4605 -1ym 8-pin soic (m) (top view) mic4605 -2ym 8-pin soic (m) (top view)
micrel, inc. mic4605 november 11, 2013 3 revis ion 1.0 pin description mic4605 -1 tdfn pin number mic4605 -2 tdfn pin number mic4605 -1 soic -8 pin number mic4605 -2 soic -8 pin number pin name pin function 1 1 ? ? en enable input. logic high on the enable pin results in normal operation, conversely , the device enters shutdow n mode with a logic low applied to enable. 2 2 1 1 vdd input supply for gate drivers. decouple this pin to vss with a > 0.1 f capacitor. 3 3 2 2 hb high - side bootstrap supply. an e xternal bootstrap capacitor is required. connect the bootstrap capacitor across this pin and hs. an on - board b ootstrap diode is connected from vdd to hb. 4 4 3 3 ho high - side drive out put. connect to the gate of the external high - side power mosfet. 5 5 4 4 hs high - side drive reference connection. connect to source of the external high - side power mosfet. connect the bottom of bootstrap capacitor to this pin. 6 ? 5 ? hi high - side drive inp ut ? 6 ? 5 pwm single pwm input. drives both the high - and l ow - side o utputs out of phase 7 ? 6 ? li low - side drive input. ? 7 ? 6 nc no c onnect . this pin is not connected internally. 8 8 7 7 vss driver reference supply input. generally connected to the power ground of external circuitry. 9 9 8 8 lo low - side drive output. connect to the gate of th e external low - side power mosfet . 10 10 ? ? nc no connect. this pin is not connected internally. ep ep ? ? epad exposed pad. connect to vss.
micrel, inc. mic4605 november 11, 2013 4 revis ion 1.0 absolute maximum ratings ( 1 ) supply voltage (v dd , v hb ? v hs ) .................... ? 0.3v to 18v input voltages (v li , v hi , v en ) ............... ? 0.3v to vdd + 0.3v voltage on lo (v lo ) ............................ ? 0.3v to vdd + 0.3v voltage on ho (v ho ) ..................... v hs ? 0.3v to v hb + 0.3v voltage on hs (continuous) ............................... ? 1v to 90v voltage on hb .............................................................. 108v average current in vdd to hb diode ....................... 100ma storage temperature (t s ) ......................... ? 60c to +150c esd rating ( 3) hbm ......................................................................... 1kv mm ......................................................................... 200v operating ratings ( 2 ) supply voltage (v dd ) [decreasing v dd ] ........ 5.25v to 16v supply voltage (v dd ) [increasing v dd ] ........... 5.5v to 16v voltage on hs .................................................... ? 1v to 85v voltage on hs (repetitive transient) ................... ? 5v to 90v hs slew rate ............................................................ 50v/ns voltage on hb ..................................................... v hs + v dd and/or ...................................... v dd ? 1v to v dd + 85v junction temperature (t j ) ........................ ? 40c to +125c junction thermal resistance 2.5mm 2.5mm t dfn - 10l ( ja ) .................... 71.4 c/w soic - 8l ( ja ) ..................................................... 99 c/w electrical characteristics ( 4 ) vdd = v hb = 12v; v ss = v hs = 0v; no load on lo or ho; t a = +25c; unless otherwise noted. bold values indicate ? 40c t j +125c . symbol par ameter condition min . typ. max. units supply current i dd vdd quiescent current li = hi = 0v 100 250 a i ddsh vdd shutdown current en = 0v with hs = floating 2.2 10 a en = 0v 25 50 i ddo vdd operating current f = 20khz 170 500 a i hb total hb quiescent current li = hi = 0v or li = 0v and hi =5v 35 75 a i hbo total hb operating current f = 20khz 50 400 a i hbs hb to v ss current, quiescent v hs = v hb = 90v 0.05 5 a i hbso hb to v ss current, operating f = 20khz 30 300 a input (ttl: li, hi, en) ( 5 ) v il low - level input voltage 0.8 v v ih high - level input voltage 2.2 v v hys input voltage hysteresis 0.1 v r i input pull - down resistance li and hi 100 300 500 k pwm 50 130 250 undervoltage protection v ddr vdd falling threshold 4.0 4.4 4.9 v v ddh vdd threshold hysteresis 0.25 v v hbr hb falling threshold 4.0 4.4 4.9 v v hbh hb threshold hysteresis 0.25 v notes: 1. exceeding the absolute maximum ratings may damage the device. 2. the device is not guaranteed to function outside its operating ratings. 3. devices are esd sensitive. handling precautions are recommended. 4. specification for packaged product only . 5. v il (max) = maximum positive voltage applied to the input which will be accepte d by the device as a logic low. v ih (min) = minimum positive voltage applied to the input which will be accepted by the device as a logic high.
micrel, inc. mic4605 november 11, 2013 5 revis ion 1.0 electrical characteristics ( 4 ) (continued) vdd = v hb = 12v; v ss = v hs = 0v; no load on lo or ho; t a = +25c; unless otherwise noted. bold values indicate ? 40c t j +125c . symbol parameter condition min. typ. max. units bootstrap diode v dl low - current forward voltage i vdd - hb = 100a 0.4 0.70 v v dh high - current forward voltage i vdd - hb = 50ma 0.7 1.0 v r d dynamic resistance i vdd - hb = 50ma 2.0 5.0 lo gate driver v oll low - level output voltage i lo = 50ma 0.3 0.6 v v ohl high - level output voltage i lo = ? 50ma, v ohl = v dd ? v lo 0.5 1.0 v i ohl peak sink current v lo = 0v 1 a i oll peak source current v lo = 12v 1 a ho gate driver v olh low - level output voltage i ho = 50ma 0.3 0.6 v v ohh high - level output voltage i ho = ? 50ma, v ohh = v hb ? v ho 0.5 1.0 v i ohh peak sink current v ho = 0v 1 a i olh peak source current v ho = 12v 1 a switching specifications (li/hi mode with inputs non - overlapping, assumes hs low before li goes high and lo low before hi goes high) t lphl lower turn - off propagation delay (li falling to lo falling) 35 75 ns t hphl upper turn - off propagation delay (hi falling to ho falling) 35 75 ns t lplh lower turn - on propagation delay (li rising to lo rising) 35 75 ns t hplh upper turn - on propagation delay (hi rising to ho rising) 35 75 ns t rc/fc output rise/fall time c l = 1000pf 20 ns t r/f output rise/fall time (3v to 9v) c l = 0.1f 0.8 s t pw minimum input pulse width that changes the output ( 5 ) 50 ns switching s pecifications pwm mode (mic4605 - 2) or li/hi mode (mic4605 - 1) with overlapping li/hi i nputs t looff delay from pwm going high / li low, to lo going low 35 75 ns v looff lo output voltage threshold for lo fet to be considered off 1.9 v t hoon delay from lo off to ho going high 35 75 ns t hooff delay from pwm going low / hi low , to ho going low 35 75 ns v swth switch node voltage threshold signaling ho is off 1 2.2 4 v
micrel, inc. mic4605 november 11, 2013 6 revis ion 1.0 electrical characteristics ( 4 ) (continued) vdd = v hb = 12v; v ss = v hs = 0v; no load on lo or ho; t a = +25c; unless otherwise noted. bold values indicate ? 40c t j +125c . symbol parameter condition min. typ. max. units switching s pecifications pwm mode (mic4605 - 2) or li/hi mode (mic4605 - 1) with overlapping li/hi i nputs t loon delay between ho fet being considered off to lo turning on 35 75 ns t loonhi for hs low /li high, delay from pwm/hi low to lo going hi 80 150 ns t swto force lo on if v swth is not detected 100 250 500 ns
micrel, inc. mic4605 november 11, 2013 7 revis ion 1.0 timing diagrams in li/hi input mode, external li/hi inputs are delayed to the point that hs is low before li is pulled high and similarly lo is low before hi goes high ho goes high with a high signal on hi after a typical delay of 35ns (t hplh ). hi going low drives ho low also with typical delay of 35ns (t hphl ). likewise, li going high forces lo high after typical delay of 35ns (t lplh ) and lo follows low transition of li after typical delay of 35ns (t lphl ). ho and lo output rise and fall times (t r /t f ) are typically 20ns driving 1000p f capacitive loads. note : all propagation delays are measured from the 50% voltage level. figure 1 . separate non - overlapping li/hi input mode (mic4605 -1)
micrel, inc. mic4605 november 11, 2013 8 revis ion 1.0 timing diagrams (continued) when li/hi input on conditions overlap, lo/ho output states are dominated by the first output to be turned on. that is, if li goes high (on), while ho is high, ho stays high until hi goes low at which point, after a delay of t hooff and when hs < 2.2v, lo goes high with a delay of t loon . should hs never trip the aforementioned internal comparator reference (2.2v), a falling hi edge delayed by 250ns will set ?hs latch? allowing lo to go high. if hs falls very fast, lo will be held low by a 35ns delay gated by hi going low. conversely, hi going high (on) when lo is high has no effect on outputs until li is pulled low (off) and lo falls to < 1.9v. delay from li going low to lo falling is t looff and delay from lo < 1.9v to ho being o n is t hoon . figure 2 . separate overlapping li/hi input mode (mic4605 -1)
micrel, inc. mic4605 november 11, 2013 9 revis ion 1.0 timing diagrams (continued) pwm signal applied to the mic4605 - 2 going low caus es ho to go low typically 35ns (t hooff ) after the pwm input goes low, at which point the switch node hs falls (1 ? 2). when hs reaches 2.2v (v swth ), the external high - side mosfet is deemed off and lo goes high, typically within 35ns (t loon ). hs falling below 1.9v sets a latch that can only be reset by pwm going high. this design prevents ringing on hs from causing an indeterminate lo state. should hs never trip the aforementioned internal comparator reference (2.2v), a falling pwm edge delayed by 250ns will set ?hs latch? allowing lo to go high. an 80ns delay gated by pwm going low may determine the time to lo going high for fast falling hs designs (3 ? 4) . pwm goes high forcing lo low in typically 35ns (t looff ) (5 ? 6) . when lo reaches 1.9v (v looff ), the low - side mosfet is deemed off and ho is allowed to go high. the delay between these two points is typically 35ns (t loon ). ho goes high with a high signal on hi after a typical delay of 35ns (t hplh ). hi going low drives ho low also with a typical d elay of 35ns (t hphl ) (7 ? 8) . ho and lo output rise and fall times (t r /t f ) are typically 20ns driving 1000pf capacitive loads. note : all propagation delays are measured from the 50% voltage level . figure 3 . pwm mode (mic4605 -2)
micrel, inc. mic4605 november 11, 2013 10 revis ion 1.0 block diagram for ho to be high, hi must be high and lo must be low. ho going high is delayed by lo falling below 1.9v. the hi and li inputs must not rise at the same time to prevent a glitch from occurr ing on the output. a minimum 50ns delay between both inputs is recommended. lo is turned off very quickly on the li falling edge. lo going high is delayed by the longer of 35ns delay of ho control signal going ?off? or the rs latch being set. the latch is set by the quicker of either the falling edge of hs or li gated delay of 240ns. the latch is present to lockout lo bounce due to ringing on hs. if hs never adequately falls due to the absence of or the presence of a ve ry weak external pull - down on hs, the gated delay of 240ns at li will set the latch allowing lo to transition high. this in turn allows the li startup pulse to charge the bootstrap capacitor if the load inductor current is very low and hs is uncontrolled. the latch is reset by the li falling edge. mic4605 top level block diagram mic4605 - 1 cross - conduction lockout/pwm input logic block diagram
micrel, inc. mic4605 november 11, 2013 11 revis ion 1.0 typical characteristics 40 60 80 100 120 140 4 6 8 10 12 14 16 quiescent current (a) input voltage (v) quiescent current vs. input voltage hs = 0v t = 125 c t = - 40 c t = 25 c 0 50 100 150 200 250 300 4 6 8 10 12 14 16 vdd operating current (a) input voltage (v) vdd operating current vs. input voltage freq = 20khz hs = 0v vhb = vdd t = 125 c t = - 40 c t = 25 c 0 20 40 60 80 4 6 8 10 12 14 16 vhb operating current (a) input voltage (v) vhb operating current vs. input voltage freq = 20khz hs = 0v vhb = vdd t = - 40 c t = 125 c t = 25 c 20 35 50 65 80 4 6 8 10 12 14 16 delay (ns) input voltage (v) propagation delay vs. input voltage t amb = 25 c hs = 0v t hplh t hphl t lplh t lphl 40 60 80 100 120 140 -50 -25 0 25 50 75 100 125 quiescent current (a) temperature ( c) quiescent current vs. temperature hs = 0v vdd = 16v vdd = 12v vdd = 5.5v 50 100 150 200 250 300 -50 -25 0 25 50 75 100 125 vdd operating current (a) temperature ( c) vdd operating current vs. temperature freq = 20khz hs = 0v vhb = vdd vdd = 16v vdd = 12v vdd = 5.5v 0 10 20 30 40 50 60 70 80 -50 -25 0 25 50 75 100 125 vhb operating current (a) temperature ( c) vhb operating current vs. temperature freq = 20khz hs = 0v vhb = vdd vhb = 16v vhb = 12v vhb = 5.5v 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 voll , volh (mv) temperature ( c) low - level output voltage vs. temperature hs = 0v i lo , i ho = 50ma vdd = 16v vdd = 12v vdd = 5.5v 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 vohl , vohh (mv) temperature ( c) high - level output voltage vs. temperature vdd = 16v vdd = 12v vdd = 5.5v hs = 0v i lo , i ho = - 50ma
micrel, inc. mic4605 november 11, 2013 12 revis ion 1.0 typical characteristics (continued) 20.0 30.0 40.0 50.0 60.0 -50 -25 0 25 50 75 100 125 delay (ns) temperature ( c) propagation delay vs. temperature vdd = vhb = 12v hs = 0v t hplh t hphl t lplh t lphl 4.2 4.3 4.4 4.5 4.6 4.7 4.8 -50 -25 0 25 50 75 100 125 thresholds (v) temperature ( c) uvlo thresholds vs. temperature hs = 0v vhb rising vdd rising vdd falling vhb falling 0.16 0.18 0.2 0.22 0.24 0.26 0.28 -50 -25 0 25 50 75 100 125 hysteresis (v) temperature ( c) uvlo hysteresis vs. temperature hs = 0v vdd hysteresis vhb hysteresis 0 2 4 6 8 0 200 400 600 800 1000 vdd operating (ma) frequency (khz) vdd operating current vs. frequency hs = 0v vhb = vdd =12v t = 125 c t = - 40 c t = 25 c 0 0.4 0.8 1.2 1.6 2 0 200 400 600 800 1000 vhb operating current (ma) frequency (khz) vhb operating current vs. frequency hs = 0v vhb = vdd = 12v t = - 40 c t = 125 c t = 25 c 0.1 1 10 100 1000 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 forward current (ma) forward voltage (v) bootstrap diode i - v characteristics hs = 0v t = 125 c t = - 40 c t = 25 c 0.0001 0.001 0.01 0.1 1 10 100 0 10 20 30 40 50 60 70 80 90 100 reverse current (a) reverse voltage (v) bootstrap diode reverse current t = 125 c t = 25 c t = 85 c hs = 0v
micrel, inc. mic4605 november 11, 2013 13 revis ion 1.0 functional description the mic4605 is a non - inverting, 85v half - bridge mosfet driver designed to independently drive both high - side and low - side n - channel mosfets. the mic4605 offers a wide 5.5v to 16v operating supply range with either dual ttl inputs (mic4605 - 1) or a single pw m input (mic4605 - 2). refer to the mic4605 top level block diagram . both drivers contain an input buffer with hysteresis, a uvlo circuit, and an output buffer. the high - side output buffer includes a high - speed level - shifting circuit that is referenced to the hs pin. an internal diode is used as part of a bootstrap circuit to provide the drive voltage for the high - side output. startup and uvlo the uvlo circuit forces the driver output low until the supply voltage exceeds the uvlo threshold. the low - side uvlo circuit monitors the voltage between the vdd and vss pins. the high - side uvlo circuit monitors the voltage between the hb and hs pins. hysteresis in the uvlo circuit prevents noise and finite circuit impedance from causing chatter during turn - on. enable input the 10 - pin 2.5mm 2.5mm tdfn package features an enable pin for on/off control of the device. logic high on the enable pin (en) allows for startup and normal operation to occur. conversely, when a logic l ow is applied on the enable pin, the device enters shutdown mode. input stage both the hi/li pins of the mic4605 - 1 and the single pwm input of the mic4605 - 2 are referenced to the vss pin. the voltage state of the input signal(s) does not change the quiesc ent current draw of the driver. the mic4605 has a ttl - compatible input range and can be used with input signals with amplitude less than the supply voltage. the threshold level is independent of the vdd supply voltage and there is no dependence between i vdd and the input signal amplitude with the mic4605. this feature makes the mic4605 an excellent level translator that will drive high - threshold mosfets from a low - voltage pwm ic. low - side driver a block diagram of the low - side driver is shown in figure 4 . the low - side driver is designed to drive a ground (vss pin) referenced n - channel mosfet. low driver impedances allow the external mosfet to be turn ed on and off quickly. the rail - to - rail drive capability of the output ensures a low r ds on from the external mosfet. a high level applied to li pin causes the upper driver mosfet to turn on and vdd voltage is applied to the gate of the external mosfet. a l ow level on the li pin turns off the upper driver and turns on the low side driver to ground the gate of the external mosfet. figure 4 . low - side driver block diagram high - side driver and bootstrap circuit a block diagram of the high - side driver and bootstrap circuit is shown in figure 5 . this driver is designed to drive a floating n - channel mosfet, whose source terminal is r eferenced to the hs pin. figure 5 . high - side driver and bootstrap circuit block diagram
micrel, inc. mic4605 november 11, 2013 14 revis ion 1.0 a low - power, high - speed, level - shifting circuit isolates the low side (vss pin) referenced circuitry from the high - side (hs pin) referenced driver. power to the high - side driver and uvlo circuit is supplied by the bootstrap circuit while the voltage level of the hs pin is shifted high. the bootstrap circuit consists of an internal diode and external capacitor, c b . in a typical application, such as the synchronous buck converter shown in figure 6 , the hs pin is at ground potential while the low - side mosfet is on . the internal diode allows capacitor c b to charge up to vdd - vf during this time (where vf is the forward voltage drop of the internal diode). after the low - side mosfet is turned off and the ho pin turns on, the voltage across capacitor c b is applied to th e gate of the upper external mosfet. as the upper mosfet turns on, voltage on the hs pin rises with the source of the high - side mosfet until it reaches vin. as the hs and hb pin rise, the internal diode is reverse biased preventing capacitor c b from discha rging. figure 6 . mic4605 driving a synchronous buck converter programmable gate drive the mic4605 offers programmable gate drive, which means the mosfet gate drive (gate to source voltage) equals the vdd voltage. this feature o ffers designers flexibility in driving the mosfets. different mosfets require different vgs characteristics for optimum r dson performance. typically, the higher the gate voltage (up to 16v), the lower the r dson achieved. for example, a ntmsf4899nf mosfet c an be driven to the on state at 4.5v gate voltage but r dson is 7.5m. if driven to 10v gate voltage, r dson is 4.5m. in low - current applications, the losses due to r dson are minimal, but in high - current applications such as power hand tools, the difference in r dson can cut into the efficiency budget. in portable hand tools and other battery - powered applications, the mic4605 offers the ability to drive motors at a lower voltage compared to the traditional mosfet drivers because of the wide vdd range (5.5v to 16v). traditional mosfet drivers typically require a vdd greater than 9v. the mic4605 drives a motor using only two li - ion batteries (total 7.2v) compared to traditional mosfet drivers which will require at least three cells (total of 10.8v) to exceed t he minimal vdd range. as an additional benefit, the low 5.5v gate drive capability allows a longer run time. this is because the li - ion battery can run down to 5.5v, which is just above its 4.8v minimum recommended discharge voltage. this is also a benefit in higher current power tools that use five or six cells. the driver can be operated up to 16v to minimize the r dson of the mosfets and use as much of the discharge battery pack as possible for a longer run time. for example, an 18v battery pack can be us ed to the lowest operating discharge voltage of 13.5v.
micrel, inc. mic4605 november 11, 2013 15 revis ion 1.0 application information adaptive dead time the mic4605 door lock/unlock module diagram illustrates how the mic4605 drives the power stage of a dc motor. it is important that only one of the two mosfets is on at any given time. if both mosfets on the same side of the half bridge are simultaneously on, vin will short to ground. the high cur rent from the shorted vin supply will then ?shoot through? the mosfets into ground. excessive shoot - through causes higher power dissipation in the mosfets, voltage spikes and ringing in the circuit. the high current and voltage ringing generate conducted and radiated emi. table 1 illustrates truth tables for both the mic4605 - 1 ( dual ttl inputs) and mic4605 - 2 ( single pwm input) that details the ?first on ? priority as well as the failsafe delay. table 1 . mic4605 - 1 and mic4605- 2 truth tables li hi lo ho comments 0 0 0 0 both outputs off . 0 1 0 1 ho will not go high until lo falls below 1.9v . 1 0 1 0 lo will be delayed an extra 240ns if hs never falls below 2.2v . 1 1 x x first on stays on until input of same goes low . pwm lo ho comments 0 1 0 lo will be delayed an extra 240ns if hs never falls below 2.2v . 1 0 1 ho will not go high until lo falls below 1.9v . minimizing shoot - through can be done passively, actively or through a combination of both. passive shoot - through protection can be achieved by implementing delays between the high and low gate drivers to prevent both mosfets from being on at the same time. these del ays can be adjusted for different applications. although simple, the disadvantage of this approach is requires long delays to account for process and temperature variations in the mosfet and mosfet driver. adaptive dead time monitors voltages on the gate drive outputs and switch node to determine when to switch the mosfets on and off. this active approach adjusts the delays to account for some of the variations, but it too has its disadvantages. high current s and fast switching voltages in the gate drive and return paths can cause parasitic ringing to turn the mosfets back on even while the gate driver output is low. another disadvantage is that the driver cannot monitor the g ate voltage inside the mosfet. figure 7 shows an equivalent circuit of the gate driver section, including parasitics. figure 7 . mic4605 driving an external mosfet the internal gate resistance (r g_ fet ) and any external damping resistor (r g ) isolate the mosfet? s gate from the driver output. there is a delay between when the driver output goes low and the mosfet turns off. this tur n - off delay is usually speci fied in the mosfet data sheet. this delay increases when an external damping resistor is used. the mic4605 uses a combination of active sensing and passive delay to ensure that both mosfets are not on at the same time, minimizin g shoot - through current. figure 8 illustrates how the adaptive dead time circuitry works. figure 8 . adaptive dead time logi c diagram (pwm) figure 9 shows the dead time (<20ns) between the gate drive output transitions as the low - side driver transitions from on - to - off while the high - side driver transitions from off - to - on.
micrel, inc. mic4605 november 11, 2013 16 revis ion 1.0 figure 9 . adaptive dead time lo (low) to ho (high) a high level on the pwm pin causes the lo pin to go low. the mic4605 monitors the lo pin voltage and prevents the ho pin from turning on until the voltage on the lo pin reaches the v looff threshold. after a short delay, the mic4605 drives the ho pin high. monitoring the lo voltage eliminates any excessive delay due to the mosfet drivers turn - off time and the short delay accounts for the mosfet turn - off delay as well as letting the lo pin voltage settle out. an external resistor between the lo output and the mosfet may affect the performance of the lo pin monitoring circuit and is not recommended. a low on the pwm pin causes the h o pin to go low after a short delay (t hooff ). before the lo pin can go high, the voltage on the switching node (hs pin) must have dropped to 2.2v. monitoring the switch voltage instead of the ho pin voltage eliminates timing variations and excessive delay s due to the high side mosfet turn - off. the lo driver turns on after a short delay (t loon ). once the lo driver is turned on, it is latched on u ntil the pwm signal goes high. this prevents any ringing or oscillations on the switch node or hs pin from turni ng off the lo driver. if the pwm pin goes low and the voltage on the hs pin does not cross the v swth threshold, the lo pin will be forced high after a short delay (t swto ), insuring proper operation. fast propagation delay between the input and outpu t dr ive waveform is desirable. it improves overcurrent protection by decreasing the response time between the control sig nal and the mosfet gate drive. minimizing propagation delay also minimizes phase shift errors in power supplies with wide bandwidth control loops. care must be taken to ensure that the input signal pulse width is greater than the minimum specified pulse width. an input signal that is less than the minimum pulse width may result in no output pulse or an output pulse whose width is significan tly less than the input. the maximum duty cycle (ratio of high side on - time to switching period) is determined by the time required for the c b capacitor to charge during the off - time. adequate time must be allowed for the c b capacitor to charge up before the high - side driver is turned back on. although the adaptive dead time circuit in the mic4605 prevents the driver from turning both mosfets on at the same time, other factors outside of the anti - shoot - through circuit?s co ntrol can cause shoot - through. o ther factors include ringing on the gate drive node and capacitive coupling of the switching node voltage on the gate of the low - side mosfet. power dissipation considerations power dissipation in the driver can be separated into three areas: ? internal diode dissipation in the bootstrap circuit ? internal driver dissipation quiescent current dissipation used to supply the internal logic and control functions. bootstrap circuit power dissipation power dissipation of the internal bootstrap diode primarily comes from the average charging current of the c b capacitor multiplied by the forward voltage drop of the diode. secondary sources of diode power dissipation are the reverse leakage current and reverse recovery effects of the diode. the average current drawn by repeated charging of the hig h - side mosfet is calculated by equation 1 : s gate ) ave ( f f q i = eq. 1 w here : q gate = t otal gate charge at v hb ? v hs f s = gate drive switching frequency
micrel, inc. mic4605 november 11, 2013 17 revis ion 1.0 the average power dissipated by the forward voltage drop of the diode equals , as illustrated in equation 2 : f ) ave ( f fwd diode v i p = eq. 2 where: v f = d iode forward voltage drop the value of v f should be taken at the peak current through the diode; however, this current is difficult to calculate because of differences in s ource impedances. the peak current can either be measured or the value of v f at the average current can be used, which will yield a good approximation of diode power dissipation. the reverse leakage current of the internal bootstrap diode is typically 3a at a reverse voltage of 85v at 125 c. power dissipation due to reverse leakage is typically much less than 1mw and can be ignored. reverse recovery time is the time required for the injected minority carriers to be swept away from the depletion region duri ng turn - off of the diode. power dissipation due to reverse recovery can be calculated by computing the average reverse current due to reverse recovery charge times the re verse voltage across the diode. the average reverse current and power dissipation due to reverse recovery can be estimated by equation 3 : rev ) ave ( rr rr diode s rr rrm ) ave ( rr v i p f t i 5 . 0 i = = eq. 3 w here : i rrm = p eak reverse recovery curren t t rr = r everse recovery time the total diode power dissipation is noted in equation 4 : rr diode fwd diode total diode p p p + = eq. 4 figure 10 illustrates a n optional external bootstrap diode may be used instead of the internal diode . figure 10 . optional bootstrap diode an external diode may be useful if high gate charge mosfets are being driven and the power dissipation of the internal diode is contributing to excessive die temperatures. the voltage drop of the external diode must be less than the internal diode for this option to work. the reverse voltage across the diode will be equal to the input voltage minus the vdd supply voltage. the above equations can be used to calculate power dissipation in the external diode; however, if the external diode has significant reverse leakage current, the power dissipated in that diode due to reverse leakage can be calculated as in equation 5 : ) d 1 ( v i p rev r rev diode ? = eq. 5 where: i r = r everse current flow at v rev and t j v rev = diode reverse voltage d = d u ty cycle = t on f s the on - time is the time the high - side switch is conducting. in most topologies, the diode is reverse biased during the switching cycle off - time.
micrel, inc. mic4605 november 11, 2013 18 revis ion 1.0 gate driver power dissipation power dissipation in the output driver stage is mainly caus ed by charging and discharging the gate to source and gate to drain capacitance of the external mosfet. figure 11 shows a simplified equivalent circuit of the mic4605 driving an external high - side mosfet. figure 11 . mic4605 driving an external mosfet dissipation during the external mosfet turn - on energy from capacitor c b is used to charge up the input capacitance of the mosfet (c gd and c gs ). the energy delivered to the mosfet is dissipated in the three resistive components, r on , r g and r g_fet . r on is the on resistance of the upper driver mosfet in the mic4605. r g is the series resistor (if any) between the driver ic and t he mosfet. r g_fet is the gate resistance of the mosfet. r g_fet is usually listed in the power mosfet?s specifications. the esr of capacitor c b and the resistance of the connecting etch can be ignored since they are much less than r on and r g_fet . the effect ive capacitances of c gd and c gs are difficult to calculate because they vary non - linearly with id, v gs , and v ds . fortunately, most power mosfet specifications include a typical graph of total gate charge vs. v gs . figu re 12 shows a typical gate charge curve for an arbitrary power mosfet. this chart shows that for a gate voltage of 10v, the mosfet requires about 23.5nc of charge. the energy dissipated by the resistive components of the gate drive circuit during turn - on is calculated as noted in equation 6 : gs g 2 gs iss v q 2 1 e so , v c q but , v c 2 1 e = = = eq. 6 where : c iss = t otal gate capacitance of the mosfet figure 12 . typical gate charge vs. v gs the same energy is dissipated by r off , r g , and r g_fet when the driver ic turns the mosfet off. assuming ron is approximately equal to r off , the total energy and power dissipated by the resistive drive elements is illustrated in equation 7 : s gs g driver gs g driver f v q p and v q e = = eq. 7 where: e driver = energy dissipated per switching cycle p driver = power dissipated per switching cycle q g = total gate charge at v gs v gs = gate to s ource voltage on the mosfet f s = switching frequency of the gate drive circuit
micrel, inc. mic4605 november 11, 2013 19 revis ion 1.0 the power dissipated inside the mic4605 is equal to the ratio of r on and r off to the external resistive losses in r g and r g_fet . letting r on = r off , the power dissipated in the mic4605 due to driving the external mosfet is illustrated in equation 8 : fet _ g g on on driver driver diss r r r r p p + + = eq. 8 supply current power dissipation power is dissipated in the mic4605 even if nothing is being driven. the supply current is drawn by the bias for the internal circuitry, the level shifting circuitry, and shoot - through current in the output dr ivers. the supply current is proportional to operating frequency and the vdd and vhb voltages. the typical characteristic graphs show how supply current varies with switching frequency and supply voltage. the power dissipated by the mic4605 due to supply c urrent is illustrated in equation 9: ihb vhb idd vdd p supply diss + = eq. 9 total power dissipation and thermal considerations total power dissipation in the mic4605 is equal to the power dissipation caused by driving the external mosfets, the supply current a nd t he internal bootstrap diode, as in equation 10: total diode drive diss supply diss total diss p p p p + + = eq. 10 the die temperature can be calculated after the t otal power dissipation is known, as in equation 11: ja total diss a j p t t + = eq. 11 where: t a = maximum ambient temperature t j = junct ion temperature (c) total diss p = power dissipation of the mic4605 ja = thermal resistance from junction to ambient air other timing considerations make sure the input signal pulse width is greater than the minimum specified pulse width. an input signal that is less than the minimum pulse width may result in no output pulse or an output pulse whose width is significantly less than the input. the maxi mum duty cycle (ratio of high side on - time to switching period) is controlled by the minimum pulse width of the low side and by the time required for the c b capacitor to charge during the off - time. adequate time must be allowed for the c b capacitor to char ge up before the high - side driver is turned on. decoupling and bootstrap capacitor selection decoupling capacitors are required for both the low side (vdd) and high side (hb) supply pins. these capacitors supply the charge necessary to drive the external m osfets and also minimize the voltage ripple on these pins. the capacitor from hb to hs has two functions: it provides decoupling for the high - side circuitry and also provides current to the high - side circuit while the high - side external mosfet is on. ceram ic capacitors are recommended because of their low impedance and small size. z5u type ceramic capacitor dielectrics are not recommended because of the large change in capacitance over temperature and voltage. a minimum value of 0.1f is required for each o f the capacitors, regardless of the mosfets being driven. larger mosfets may require larger capacitance values for proper operation. the voltage rating of the capacitors depends on the supply voltage, ambient temperature and the voltage derating used for r eliability. 25v rated x5r or x7r ceramic capacitors are recommended for most applications. the minimum capacitance value should be increased if low voltage capacitors are used because even good quality dielectric capacitors, such as x5r, will lose 40% to 7 0% of their capacitance value at the rated voltage.
micrel, inc. mic4605 november 11, 2013 20 revis ion 1.0 placement of the decoupling capacitors is critical. the bypass capacitor for vdd should be placed as close as possible between the vdd and vss pins. the bypass capacitor (c b ) for the hb supply pin must be located as close as possible between the hb and hs pins. the etch connections must be short, wide, and direct. the use of a ground plane to minimize connec tion impedance is recommended (r efer to the grounding, compone nt placement, and circuit layout section for more information ) . the voltage on the bootstrap capacitor drops each time it delivers charge to turn on the mosfet. the voltage drop depends on the gate charge required by the mosfet. most mosfet specifications specify gate charge versus v gs voltage. based on this informatio n and a recommended v hb of less than 0.1v, the minimum value of bootstrap capacitance is calculated as: hb gate b v q c ? eq. 12 where: q gate = total gate charge at v hb ? v hb = voltage drop at the hb pin the decoupling capacitor for the vdd input may be calculated in with the same formula; however, the two capacitors are usually equal in value. dc motor applications mic4605 mosfet drivers are widely used in dc motor applications. they address brushed motors in both half - bridge and full - bridge motor topologies as well as three - phase brushless motors. as shown in figure 13 , figure 14 , and figure 15 , the drivers switch the mosfets at variable duty cycles that modulate t he voltage to control motor speed. in the half - bridge topology, the motor turns in one direction only. the full - bridge topology allows for bidirectional control. three - phase motors are more efficient compared to the brushed motors but require three half - br idge switches and additional circuitry to sense the position of the rotor. the mic4605 85v operating voltage offers the engineer margin to protect against back electromotive force (emf) which is a voltage spike caused by the rotation of the rotor. the bac k emf voltage amplitude depends on the speed of the rotation. it is good practice to have at least twice the hv voltage of the motor supply. 85v is plenty of margin for 12v, 24v, and 40v motors. figure 13 . half - bridge dc motor figure 14 . full - bridge dc motor
micrel, inc. mic4605 november 11, 2013 21 revis ion 1.0 figure 15 . three - phase brushless dc motor driver ? 24v block diagram the mic4605 is offered in a small 2.5mm 2.5mm tdfn package for applications that are space constrained and an soic - 8 package for ease of manufacturing. the motor trend is to put the motor control circuit inside the motor casing, which requires small pack aging because of the size of the motor. the mic4605 offers low uvlo threshold and programmable gate drive, which allows for longer operation time in battery operated motors such as power hand tools. cross conduction across the half bridge can cause catas trophic failure in a motor application. engineers typically add dead time between states that switch between high input and low input to ensure that the low - side mosfet completely turns off before the high - side mosfet turns on and vice versa. the dead time depends on the mosfet used in the application, but 200ns is typical for most motor applications. power inverter power inverters are used to supply ac loads from a dc operated battery system, mainly during power failure. the battery voltage can be 12vdc, 24vdc, or up to 36vdc, depending on the power requirements. there two popular conversion methods, type i and type ii, that convert the battery energy to ac line voltage (110vac or 230vac). figure 16 . type i inverter topology a s shown in figure 16 , type i is a dual - stage topology where line voltage is converted to dc through a transformer to charge the storage batteries. whe n a power failure is detected, the stored dc energy is converted to ac through another transformer to drive the ac loads connected to the inverter output. this method is simplest to design but tends to be bulky and expensive because it uses two transformer s. type ii is a single - stage topology that uses only one transformer to charge the bank of batteries to store the energy. during a power outage, the same transformer is used to power the line voltage. the type ii switches at a higher frequency compared to the type i topology to maintain a small transformer size. both types require a half bridge or full bridge to pology to boost the dc to ac. this application can use two mic4605s. the 85v operating voltage offers enough margin to address all of the availa ble banks of batteries commonly used in inverter applications. the 85v operating voltage allows designers to increase the bank of batteries up to 72v, if desired. the mic4605 can sink as much as 1a, which is enough current to overcome the mosfet?s input ca pacitance and switch the mosfet up to 50khz. this makes the mic4605 an ideal solution for inverter applications. as with all half bridge and full bridge topologies, cross conduction is a concern to inverter manufactures because it can cause catastrophic failure. this can be remedied by adding the appropriate dead time between transitioning from the high - side mosfet to the low - side mosfet and vice versa. grounding, component placement, and circuit layout nanosecond switching speeds and ampere peak current s in and around the mic4605 drivers require proper placement and trace routing of all components. improper placement may cause degraded noise immunity, false switching, excessive ringing, or circuit latch - up.
micrel, inc. mic4605 november 11, 2013 22 revis ion 1.0 figure 1 7 shows the critical current paths when the driver outputs go high and turn on the external mosfets. it also helps demonstrate the need for a low impedance ground plane. charge needed to tu rn - on the mosfet gates comes from the decoupling capacitors c vdd and c b . current in the low - side gate driver flows from c vdd through the internal driver, into the mosfet gate, and out the source. the return connection back to the decoupling capacitor is ma de through the ground plane. any inductance or resistance in the ground return path causes a voltage spike or ringing to appear on the source of the mosfet. this voltage works against the gate drive voltage and can either slow down or turn off the mosfet d uring the period when it should be turned on. current in the high - side driver is sourced from capacitor c b and flows into the hb pin and out the ho pin, into the gate of the high side mosfet. the return path for the current is from the source of the mosfet and back to capacitor c b . the high - side circuit return path usually does not have a low - impedance ground plane so the etch connections in this critical path should be short and wide to minimize parasitic inductance. as with the low - side circuit, impedance between the mosfet source and the decoupling capacitor causes negative voltage feedback that fights the turn - on of the mosfet. it is important to note that capacitor cb must be placed close to the hb and hs pins. this capacitor not only provides all the e nergy for turn - on but it must also keep hb pin noise and ripple low for proper operation of the high - side drive circuitry. figure 17 . turn - on current paths figure 18 shows the critical current paths when the driver outputs go low and turn off the external mosfets. short, low - impedance connections are important during turn - off for the same reasons given in the turn - on explanation. current flowing through the internal diode replenishes charge in the bootstrap capacitor, c b . figure 18 . turn - off current paths use the following layout guidelines for optimum circuit performance: ? use a ground plane to minimize parasitic inductance and impedance of the return paths. the mic4605 is capable of greater than 1a peak currents and any impedance between the mic4605, the decoupling capacitors, and the external mosfet will degrade the performan ce of the driver. ? a typical layout of a synchronous buck converter power stage is shown in figure 19 . the high - side mosfet drain connects to the input supply voltage (drain) and the source connects to the switching node. the low - side mosfet drain connects to the switching node and its source is connected to ground. the buck converter output inductor (not shown) connects to the switching node. the h igh - side drive trace, ho, is routed on top of its return trace, hs, to minimize loop area and parasitic inductance. the low - side drive trace lo is routed over the ground plane to minimize the impedance of that current path. the decoupling capacitors, c b and c vdd , are placed to minimize etch length between the capacitors and their respective pins. this close placement is necessary to efficiently charge capacitor c b when the hs node is low. all traces are 0.025in wide or greater to reduce impedance. c in is us ed to decouple the high current path through the mosfets.
micrel, inc. mic4605 november 11, 2013 23 revis ion 1.0 top side bottom side figure 19 . typical layout of a synchronous buck converter power stage
micrel, inc. mic4605 november 11, 2013 24 revis ion 1.0 package information ( 6 ) and recommended layout pattern 8 - pin soic (m) note: 6. package information is correct as of the publication date. for updates and most current information, go to www.micrel.com .
micrel, inc. mic4605 november 11, 2013 25 revis ion 1.0 package information ( 6 ) and recommended layout pattern (continued) 2.5mm 2.5mm 10 - pin tdfn (mt) micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944 - 0800 fax +1 (408) 474 -10 00 web http://www.micrel.com micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in th is data sheet. this information is not intended as a warranty and micrel does not assume responsibility for its use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in micrel?s terms and conditions of sale for such products, micrel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right . micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the u ser. a purchaser?s use or sale of micrel products for use in life support appliances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 20 13 micrel, incorporated.

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